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LGA 1700 is designed as a replacement for LGA 1200 (known as Socket H5) and it has 1700 protruding pins to make contact with the pads on the processor. Compared to its predecessor, it has 500 more pins, which required a major change in socket and processor sizes; it is 7.5 mm longer. It is the first major change in Intel's LGA desktop CPU socket size since the introduction of LGA 775 in 2004, especially for consumer-grade CPU sockets. The larger size also required a change in the heatsink fastening holes configuration, making previously used cooling solutions incompatible with LGA 1700 motherboards and CPUs.


DDR5 vs. DDR4: What’s Changed with DDR5?

DDR5 DRAM modules boast several key improvements over previous generations. In addition to being faster and offering higher densities, they also come equipped with intelligent features that will help drive the next era in computing.

DIMM Pin Layout Change

The notch location (gap) between pins on memory modules has changed with DDR5, preventing newer modules from being accidentally plugged into DDR4 sockets.

PMIC (Power Management Integrated Circuit)

A PMIC on the module helps reduce the role of your motherboard in power management by handling most of it on-chip. It’s essentially the brains behind an intelligent voltage regulation system that facilitates the configurability of voltage ramps and levels while offering current monitoring features.

Dual 32-Bit Subchannels

Standard DDR5 modules will feature two independently addressable 32-bit subchannels. This will help multi-core processors more efficiently manage the retrieval of data from memory.

ODECC (On-Die Error Correction Code) Memory

All DDR5 DRAM modules feature the ability to correct errors before a bad bit even leaves the module. As DRAM density increases (due to wafer lithography shrinks), the potential for data leakage within modules also goes up. ODECC catches any such bad bits early on and corrects them.

Please note that ODECC cannot correct errors outside a chip. Extra DRAM bits are required to allow for such corrections. DDR5 modules add an extra 8-bits per 32-bit address for a total of 80-bits to handle error correction, compared to 72-bits on DDR4. These additional bits can work in tandem with ECC-enabled CPUs for servers and workstations that feature the ability to correct single or multi-bit errors on the fly.

Lower Power Requirements

Standard DDR5 modules now only need 1.1V to achieve speeds of 4800MHz. This is a marked improvement over DDR4’s 1.2V requirement.

Higher Speeds and Greater Bandwidth

DDR5 DRAM modules now start with a baseline memory speed of 4800MHz – a 50% increase over DDR4.

Double the Banks and Burst Length

Compared to DDR4 modules, DDR5 offers double the memory bank groups as well as double the burst length to enhance efficiency.

Current JEDEC standard for DDR5 Memory

As you know, JEDEC standards are specifications set by the Joint Electron Device Engineering Council (JEDEC) that represent a sound, reliable approach to memory.

The current JEDEC standard for DDR5 memory is –

DDR5-4800 CL40-39-39 @ 1.1V

DDR5 Memory Kits Launch Dates

Kingston will launch DDR5 alongside Intel’s next-generation processors and accompanying next-gen motherboards. As of now, there is no official announcement from Intel about this launch. This page will be updated when Intel releases more details.

DDR5 Memory Overclocking Levels

Memory modules specifications aren’t final yet. Please watch for Kingston’s upcoming range of FURY DDR5 memory modules for more information. Speeds, latencies, and voltages will be announced and confirmed only at launch.

DDR5 vs. DDR4 Memory Costs

Historically, newer memory technology has always commanded close to a 30-40% premium over the previous generation. However, this time, DDR5 includes additional components that have driven the costs up further. As a result, we expect a 50-60% price premium compared to DDR4 at launch.

It typically takes around 2 years to reach price parity with previous generations, and we expect trends to remain similar with DDR5 modules as well. SOURCE:

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